13:30 – 14:15 |
Particle - surface interactions in semiconductor cleaning
Jakub Nalaskowski (IBM, USA)
Nature of the interactions between contaminant particles and the surface will be discussed based on examples of hydrophilic and hydrophobic surfaces present in modern semiconductor structures. Influence of solution chemistry parameters, including surfactant and polymer films adsorbed at the surface will be presented. In addition to aqueous cleaning systems, particle-surface interactions in semiaqueous and nonaqueous cleaning systems will be also discussed.
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14:15 – 14:55 |
Ozonized water is green
D. Martin Knotter (NXP Semiconductors, the Netherlands)
The use of ozone in semiconductor industry has a green ribbon of being environmental benign. This is indeed true, but only if some counter measures are taken to contain the ozone and after verification of the potential reaction products of ozone with photoresist. This presentation will address the stability and destruction of ozone, but also the reaction mechanism that explains that the resist is transformed into ordinarily organic compounds.
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14:55 – 15:15 |
Coffee break |
15:15 – 15:55 |
Cleaning and etching of advance gate stacks
Joel Barnett (Sematech, USA)
This presentation will provide an overview of issues regarding surface preparation involved in the integration of high-k metal gates. Topics to be covered include high-k surface preparation and cleaning, high-k removal and other cleaning challenges, electrical effects and high-k metal gate integration schemes. |
15:55 – 16:25 |
High-mobility channels: fundamentals of surface preparation
Martin M. Frank (IBM, USA)
This tutorial will review fundamental surface preparation issues to be considered when implementing high-mobility channels, focusing on germanium channel gate stack preparation, while also touching upon III-V channels. Chemical trends will be summarized in comparison to silicon, including processes and phenomena such as etching, native oxide formation, surface and gate stack interface passivation, metal contamination, and particle adhesion. |
16:25 – 16:35 |
Short break |
16:35 – 17:20 |
Post-etch wet residue removal in Cu/low-k integration
Guy Vereecke (IMEC vzw, Belgium)
Overview of issues brought about by the integration of porous low-k dielectrics in Cu interconnects. Post-etch residue removal and photoresist strip, with emphasis on wet cleaning processes and applications. |
17:20 – 17:50 |
Stacking and interconnection of ICs in the 3rd dimension
Bart Swinnen (IMEC vzw, Belgium)
Stacking and interconnection of ICs in the 3rd dimension promises to enable continued system size and cost reduction in times where traditional 2D scaling becomes increasingly challenging. This lecture will review different 3D integration schemes as well as the novel challenges that they bring about for surface cleaning and conditioning. |
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Speakers
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Prof. Jakub Nalaskowski, IBM
Particle – surface interactions in semiconductor cleaning
Jakub Nalaskowski obtained a M.S. and a Ph.D. degree in Chemical Technology from Gdansk University of Technology, Gdansk, Poland. In 2002 he joined University of Utah as a Research Assistant Professor and subsequently in 2005 as a Research Associate Professor working on fundamentals of wet separation processes, particle-surface interaction characterization, atomic force microscopy, surface characterization, preparation and cleaning. In 2008 he joined IBM at T.J. Watson Research Center where he is working on interfacial interactions in CMP processes, contact mechanics, and post-CMP surface characterization. He is author or co-author of about 50 technical publications on interfacial interactions, atomic force microscopy, and surface preparation and characterization.
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Dr. D. Martin Knotter, NXP Semiconductors
Ozonized water is green
Dr. D. Martin Knotter has obtained his Masters in Chemistry at the University of Amsterdam and his Ph.D. in Chemistry (organometallic chemistry) at the University of Utrecht. In 1990 he joined the Surface Chemistry group of Philips Research in Eindhoven and 5 years later started to work in the Semiconductor Process Module Group working on cleaning and wet process technology. Since 2000, he is technical consult of the Contamination Expertise Center of Philips Semiconductors and is located in the Quality & Analytical Service department in Nijmegen. The change from Philips Semiconductors to NXP Semiconductors in 2005 had no impact on the job.
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Dr. Joel Barnett, Sematech
Cleaning and etching of advanced gate stacks
Joel Barnett received his BS degree in Chemical Engineering from the University of California-Berkeley in 1984 and has over 20 years of semiconductor experience. He has authored and co-authored more than 60 journal and conference papers in various semiconductor research areas including metal deposition, cleans, high-k and metal gate processes and statistics. His current position is Senior Member of the Technical Staff in the Front End Process Division at SEMATECH (Austin, Texas). He works across multiple projects, developing pre-gate and pre-deposition cleans, post-gate etch cleans, metal wet etch processes and other surface preparation solutions for Advanced Technologies. He is also the chair of the ITRS Surface Preparation Sub-TWG team.
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Dr. Martin M. Frank, IBM
High-mobility channels: fundamentals of surface preparation
Martin M. Frank is a Research Staff Member at IBM T. J. Watson Research Center in Yorktown Heights, NY. His interests include surface preparation, high-k dielectrics, metal electrodes, and high-carrier-mobility materials. Dr. Frank holds a Ph.D. degree in physics from Humboldt-Universität zu Berlin, Germany. In 2000, he received the Otto Hahn Medal for outstanding scientific achievements in the study of oxide-supported metal nanoparticles for catalysis. During a postdoctoral appointment at Rutgers University, he investigated high-k dielectrics and self-assembled monolayers for molecular electronics. On an assignment from IBM to IMEC in Leuven, Belgium, he also studied photoresist chemistry. Dr. Frank has authored or co-authored more than 50 peer-reviewed and invited publications, including nine review articles and book chapters. He holds five U.S. patents, with ca. 15 patents pending.
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Dr. Guy Vereecke, IMEC
Post-etch wet residue removal in Cu/low-k integration
Guy Vereecke holds a M.S. and a Ph.D. degree in Materials Sciences from the Université Catholique de Louvain (UCL), Louvain-La-Neuve, Belgium. From 1987 to 1992 he was a researcher in the Laboratory for Chemistry of Interfaces of the UCL, investigating the preparation of calcium phosphate biomaterials and the adsorption of proteins by various surface analysis techniques. In 1993 he joined the Ultra Clean Processing group of the Interuniversity Microelectronics Center (IMEC) where he is presently heading the BEOL cleaning team. He is author or co-author of about 50 journal and 90 conference papers on surface analysis, gas phase contamination, dry cleaning, cleaning of nano-particles and damaging of structured wafers, defectivity in direct-CMP of advanced dielectrics, and wet strip and characterization of post-etch photoresist.
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Dr. Bart Swinnen, IMEC
Stacking and interconnection of ICs in the 3rd dimension
Bart Swinnen, PhD, joined IMEC in 2003 as program manager for the wafer-level packaging (WLP) program. Today, he manages both the 3D WLP program and the 3D-stacked integrated circuit program.
Before joining IMEC, Dr. Swinnen was a member of ASML (Eindhoven, NL) engineering team. There he developed stepper alignment strategies for processed wafers.
Dr. Swinnen earned a PhD in Solid State Physics in 1997 at the University of Leuven, Belgium, working there afterwards in a postdoctoral position.
A prolific industry writer and speaker, Dr. Swinnen has authored or co-authored more than 30 papers. He holds three patents.
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